In some memory arrays, an initial state of a memory cell is known before a write operation. For example, the initial state of a write-once memory cell is its un-programmed state (e.g., Logic 1). During a write operation, the initial state of a memory cell is switched to a different state when that memory cell is programmed with a value different from that represented by its initial state (e.g., Logic 0). Often, data to be stored in a memory array includes bits that are of the same value as the initial state of the memory cells. Although storage of those bits does not involve switching the digital state of a memory cell, with some programming methods, the same amount of programming time is spent storing those bits as is spent storing bits of the opposite value. By not taking advantage of the known initial state of the memory array, bandwidth and power are unduly consumed.
There is a need, therefore, for a memory device and method that can be used to improve write bandwidth and power for memories with known initial states.
The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims.
By way of introduction, the preferred embodiments described below provide a memory device and method for storing bits in a memory array. In one preferred embodiment, a memory device is provided comprising a plurality of memory cells that are in a first digital state and can be switched to a second digital state. A plurality of bits to be stored in the memory array are provided, and if the plurality of bits comprise more bits in the second digital state than in the first digital state, the plurality of bits are inverted before being stored in the memory array. In another preferred embodiment, a memory device is provided comprising a memory array and bit inversion circuitry. In yet another preferred embodiment, a plurality of bits are inverted before being stored in a memory array if the plurality of bits comprise more bits in a non-preferred digital state than in a preferred digital state. Other preferred embodiments are provided, and each of the preferred embodiments described below can be used alone or in combination with one another.
The preferred embodiments will now be described with reference to the attached drawings.